| About this Abstract |
| Meeting |
2025 TMS Annual Meeting & Exhibition
|
| Symposium
|
2D Materials – Preparation, Properties, Modeling & Applications
|
| Presentation Title |
Charge Trapping and Relaxation in 2D Grain Boundaries |
| Author(s) |
Krishna Bharadwaj Balasubramanian |
| On-Site Speaker (Planned) |
Krishna Bharadwaj Balasubramanian |
| Abstract Scope |
Charge trapping in layered semiconductors can be a reliability concern for high-speed logic devices and an origin for non-volatile memory for neuromorphic applications. Here, we show that generic grain boundary in layered semiconductors can be described by the behavior of certain basis defect structures and explore the trapping efficiency and charge relaxations in the specific defect sites. We observe that different defect structures show very different trapping characteristics due to their specific energy levels in the sub-gap region. Even the commonly observed 5-7 Stone-Wales structures presents two different flavors. We provide specific trapping and detrapping rates from first principles calculations and demonstrate the net effect of a random distribution of such traps in a chemical vapor deposited MoS2 transistor. With a rapidly maturing synthesis techniques of large area 2D material systems, we think this report provides crucial information to engineer the inevitable defect structures in these layered systems. |
| Proceedings Inclusion? |
Planned: |
| Keywords |
Electronic Materials, Modeling and Simulation, Other |